interview amd chief architect zen ryzenian

#Interview amd chief architect zen ryzenian series

These chiplets are linked by AMD's own second generation Infinity Fabric, allowing a low-latency interconnect between the cores and to IO. The server IO die is able to serve as a hub to connect up to eight 8-core chiplets, while the IO die for Matisse is able to connect up to two 8-core chiplets. The IO die used by Matisse processors is a small chip produced on GF 12 nm, whereas the server IO die utilized for Threadripper and Epyc is far larger. For earlier Zen 2 products the IO and uncore functions are performed within this separate IO die, which contains the memory controllers, the fabric to enable core to core communication, and the bulk of uncore functions. This approach differs from Zen 1 products, where the same die (Zeppelin) is used in a simple monolithic package for Summit Ridge products (Ryzen 1000 series) or used as interconnected building blocks in an MCM (up to four Zeppelin dies) for first generation Epyc and Threadripper products. Zen 2 introduced the chiplet based architecture, where desktop, workstation, and server CPUs are all produced as multi-chip modules (MCMs) these Zen 2 products utilise the same core chiplets but are attached to different uncore silicon (different IO dies) in a hub and spoke topology.

Zen 2 Matisse products were the first consumer CPUs to use TSMC's 7 nm process node.

#Interview amd chief architect zen ryzenian series

The Ryzen 3000 series CPUs were released on July 7, 2019, while the Zen 2-based Epyc server CPUs (codename 'Rome') were released on August 7, 2019. History First-gen Zen with and without GPU Epyc 7001 MCM Ryzen Threadripper 1000 MCM First generation

It is used in Ryzen (desktop and mobile), Ryzen Threadripper ( workstation/high end desktop), and Epyc (server). Zen is the codename for a family of computer processor microarchitectures from AMD, first launched in February 2017 with the first generation of its Ryzen CPUs.